The Memory Contrarian: Why the Rotation to Co-Packaged Optics Is a Trade on Physics, Not Proof

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On August 9, a well-known photon-stock analyst posted something that triggered a familiar shiver in my spine. He had sold his memory positions months earlier, and he was now seriously considering "bottom fishing" in memory stocks while quietly rotating into co-packaged optics. The post was short on data and long on conviction. In crypto, I have watched this exact pattern: a crowded trade rotates because the story feels exhausted, and the next story feels inevitable. But physical infrastructure does not move on sentiment. It moves on yield curves, packaging capacity, and export controls. After years of auditing cryptographic claims and governance incentives, I have learned to trust the timing of a confession more than the words.

First, let us define the objects. Memory stocks here mean the DRAM, NAND, and HBM players—Samsung, SK Hynix, and Micron most of all. Co-packaged optics, or CPO, refers to placing optical engines on the same substrate as the switch ASIC, replacing pluggable transceivers in AI data centers. The two are not substitutes. Memory stores. Optics moves. But in the AI buildout, they compete for the same investor attention and, more importantly, for the same advanced packaging capacity. A large part of the analyst's case hinges on the belief that the bottleneck in AI infrastructure has shifted. HBM, in his view, solved the storage wall. The next wall is the network. That is technically coherent. It is also incomplete.

Let me start with what the rotation gets right. The HBM era was genuinely transformative. DRAM makers have moved to 1-beta-class nodes, and HBM3E is now in mass production with TSV stacking. NAND has crossed two hundred layers, and the industry is selling TLC and QLC into AI servers. Those are real achievements. But optical interconnect has not kept up with compute scaling. When GPU clusters scale from ten thousand to one hundred thousand chips, electrical interconnect power and density become brutal constraints. CPO shortens the distance between the optical engine and the switch, cutting power and latency. That is a real physics argument, not a narrative. Based on the packaging roadmaps I have seen, the direction is correct.

The hard part is the other side of the ledger. CPO is nowhere near ready for prime time. It depends on silicon photonics and 2.5D/3D advanced packaging. The switch ASIC is controlled by Broadcom and Marvell. The optical engine can be built by many companies, but integrating it with a switch chip at high density is a yield and reliability nightmare. Coupling losses, thermal mismatch, and mechanical reliability are still unresolved at scale. My honest read is that CPO needs two to three more years of yield climbing before it can seriously displace pluggable transceivers. The rotation, therefore, is a bet on a 2027 story dressed up as a 2025 insight.

The deeper problem is that the market treats memory as a monolith. The bearish consensus on memory is built on the commodity side: consumer DRAM and NAND. PC shipments are weak, smartphone upgrades are uninspiring, and the memory makers just added capacity after an extraordinary 2024 and 2025 pricing surge. The forward-looking fear is oversupply, and that fear is rational. But HBM and enterprise SSD are not the same market. AI training and inference demand for HBM has been the defining constraint of this cycle, not a cyclical afterthought. The "sell memory, buy CPO" mental model conflates a seasonal commodity with a structural growth product. That is a category error.

The real insight is that the market's collective bearishness on memory is not about AI demand disappearing. It is about the speculative layer of traditional memory turning sour.

Let me go deeper into the technical details, because this is where the crowd usually stops. DRAM and NAND are mature businesses. Yields are high, fabs are amortized, and the remaining challenges are about cost. HBM is the exception: TSV stacking and integration with CoWoS packaging still carry meaningful complexity, but HBM3E has reached a point where the big three can ship it in volume. CPO, by contrast, is still wrestling with the packaging problem. The switch ASIC runs on 5nm or 3nm logic. The photonic integrated circuit runs on older silicon-photonics processes. Bringing them together on a single interposer requires low-loss optical coupling and high-density electrical interconnect, and no one has yet proven that this can be done at volume with acceptable reliability. This is not a question of cleverness; it is a question of process maturity.

At the material level, the two trades are equally constrained. Memory requires EUV lithography for advanced DRAM, plus high-purity silicon wafers, specialty gases, and photoresists. Those are controlled by a small set of Japanese, American, and Dutch suppliers. CPO requires InP epitaxial wafers for lasers, SOI substrates for silicon photonics, fiber arrays, and high-precision coupling machines. The precision die-attach and active alignment equipment comes from Japan and the Netherlands. So neither trade escapes the supply chain bottleneck. The difference is that memory's equipment is already subject to export controls, while CPO's critical tools are not yet restricted. That gap is an opportunity, but it can close quickly.

Supply chain power tells a similar story. Memory is a classic oligopoly. Samsung, SK Hynix, and Micron control roughly ninety percent of the DRAM market, and the same names dominate HBM. They are incumbents with enormous pricing power during upcycles. CPO, on the other hand, is a supply chain in the middle of a power struggle. The switch ASIC vendors sit at the top. Advanced packaging is dominated by TSMC's CoWoS. The optical engine suppliers are numerous and fragmented. In a CPO world, the module manufacturer is not the crown jewel; the switch ASIC is. That means most of the value in the CPO trade flows to Broadcom, Marvell, and TSMC, not to the optical module companies that the market usually confuses with CPO leaders. The supply chain does not reward the storyteller; it rewards the bottleneck owner.

And here is the uncomfortable fact: CoWoS capacity is already the most contested resource in AI hardware. Nvidia is consuming enormous amounts of it for GPU packaging. If CPO ramps, it needs the same CoWoS lines. So the rotation from memory to CPO is not a move away from the packaging choke point; it is a move toward the same choke point, from a different direction. The escape from one bottleneck leads directly into another. This is a governance lesson as much as a technical one. In DAO design, we say: govern the exit, govern the entrance. The way you enter a trade determines the way you can exit it. If you enter CPO because everyone is excited, you will be forced to exit during the first bad news cycle. If you enter memory because the crowd is bearish but the AI logic is intact, you are at least entering against sentiment rather than with it.

The Memory Contrarian: Why the Rotation to Co-Packaged Optics Is a Trade on Physics, Not Proof

Capex dynamics reinforce the caution. Memory makers have spent 2025 running at high utilization, especially for HBM, where utilization is above ninety-five percent. But they have also announced ambitious new fabs. Micron is building in New York. SK Hynix is expanding in Yongin. Samsung is investing in Pyeongtaek. Capital intensity in memory runs around thirty to forty percent of revenue, and depreciation on a new fab can drag gross margins by five to ten points in the first years. The market's concern about oversupply in 2026 and 2027 is not paranoia; it is a direct consequence of the capacity decisions made during the good times. On the CPO side, the asset-light model of design companies looks attractive, but the heavy capital sits upstream in the foundries. CPO companies can raise less money and move fast, but only because the real cost is hidden in TSMC's depreciation schedule.

Demand is the most important swing factor, and here the analyst's story gets even blurrier. AI server demand for memory is genuinely exponential. HBM supply was the main bottleneck in 2025. But the broader memory market depends on smartphones, PCs, and consumer storage, and that recovery is weak. The collective bearishness on memory is therefore a bet that the commodity side overshoots and drags down the entire sector. That may happen in a pure price-cycle sense. But it does not break the HBM and enterprise SSD thesis. If anything, it creates the opportunity the photon-stock analyst is looking for: the market may be pricing memory as if AI demand had disappeared when it has not. The contrarian angle is that the crowd is right about the cycle and wrong about the asset class.

The Memory Contrarian: Why the Rotation to Co-Packaged Optics Is a Trade on Physics, Not Proof

Competitive structure makes this even sharper. In memory, the top three are still earning enormous margins from AI-specific products while flooding the market with commodity chips. In CPO, the structure is inverted. The switch ASIC belongs to Broadcom and Marvell. The advanced packaging belongs to TSMC. The optical module side is crowded with Chinese and Taiwanese suppliers. The customers are hyperscale cloud providers, and there are very few of them. That means pricing power in CPO will flow upward to the ASIC designers and the packaging monopolist, not to the module assemblers. The market may be buying the wrong layer of the CPO story entirely.

Geopolitics adds a layer that many sentiment-driven posts ignore. The United States has already restricted advanced HBM exports to China, and further restrictions are plausible. If that happens, Chinese AI companies lose immediate access to the highest-bandwidth memory, and the market will have to price in a bifurcated world. Memory becomes a geopolitical instrument, not just a commodity. CPO is not immune. The high-end optical engines and lasers that power them are dominated by American and Japanese suppliers. If Washington decides that co-packaged optics is as critical as AI chips, the same export controls could land within a few years. China's Big Fund III, roughly 344 billion yuan, is aimed at equipment, materials, advanced packaging, and photonics. That is not enough to break the EUV bottleneck, but it is enough to accelerate the domestic optical engine and silicon photonics ecosystem. There is no clean safe harbor in this rotation.

The Memory Contrarian: Why the Rotation to Co-Packaged Optics Is a Trade on Physics, Not Proof

I also notice something in the behavioral texture of the analyst's post. He revealed his timing almost in passing: he sold memory months ago, presumably near a peak, and he is now considering bottom fishing. That is a governance failure in miniature. Two weeks ago, the photonics sector panicked over a rumored cut in AI capital spending, and then recovered when the rumor did not materialize. That tells me the market is hypersensitive to any signal that AI CapEx is peaking. CPO is supposed to be the safe AI infrastructure trade, but it is directly exposed to the same CapEx anxiety. Memory is also exposed, because HBM is sold into the same data centers. In fact, the entire AI hardware complex is a single risk factor wearing different costumes.

So what should a thoughtful observer take from this? I would point to three flags. First, watch the HBM contract price, not the chatter. As long as HBM is priced as a premium product, the memory bear thesis is selective, not broad. Second, watch CoWoS allocation. The moment CPO begins to siphon real CoWoS capacity from Nvidia, you will see a real competitive signal. Third, watch the export-control language. If high-end optical engines appear on a restriction list, the CPO trade will become as geopolitical as memory already is.

The fundamental lesson is that the physical world does not care about narrative rotations. Code is law, but people are the soul. In software, the law is the code. In AI hardware, the law is yield, capacity, and physics. The soul is the market's tendency to fall in love with a story just as it reaches its peak. The photon-stock guru's instinct to hunt for value in memory while moving to CPO is not a contradiction. It is a search for the next bottleneck. It just does not yet have the technical evidence to justify the price.

In the end, the strongest position may be the most uncomfortable one: refuse to choose a side prematurely. Memory is not dead. CPO is not ready. The bull market is eager to reward whoever announces the next bottleneck, but physical infrastructure reveals itself slowly, through delivery dates, yield reports, and packaging reservations. I plan to listen to those signals rather than to any single analyst's rotation. The best governance, after all, does not chase the exit. It questions the entrance.